PhD in Hardware Architectures for Physics-Informed AI
Develop next-generation FPGA/ASIC platforms for real-time physics-informed AI acceleration in edge and mission-critical sensing systems.
Best for:Best for master’s graduates in computer science, electrical engineering, or related fields with a passion for hardware-software co-design, FPGA/ASIC development, and physics-informed AI.
Overview
This PhD position at Eindhoven University of Technology (TU/e) focuses on designing novel hardware architectures for physics-informed AI models, with a strong emphasis on FPGA and ASIC-based acceleration. The project aims to bridge the gap between computationally demanding AI methods and efficient hardware deployment, enabling real-time operation in scientific, industrial, and sensing applications. You will collaborate with the Electrical Engineering department and contribute to the NWO OTP project on counterfeit cash detection using Physics-Infused Deep Unfolding (PIDU), while also developing broader design methodologies for physics-informed AI techniques. The role involves algorithm development, hardware-software co-design, and practical demonstrator creation, with opportunities for interdisciplinary collaboration and teaching.
What you'll do
- Investigate novel hardware architectures for physics-informed AI models, focusing on FPGA/ASIC-based acceleration and edge deployment.
- Develop hybrid model-based and learning-based algorithms optimized for reconfigurable hardware platforms.
- Design and implement real-time demonstrators, including a counterfeit cash detection system using Physics-Infused Deep Unfolding (PIDU).
- Collaborate with industrial partners (e.g., Smiths Detection, Sioux Technologies) to integrate research findings into practical applications.
- Contribute to both fundamental research and applied demonstrators within the NWO OTP project framework.
- Develop teaching skills and mentor students as part of the PhD program.
- Publish research findings in top-tier conferences and journals within the field.
Requirements
Degree required: Master’s degree (or equivalent) in Computer Science, Electrical Engineering, or a related technical field
Degree offered: PhD
Language: Fluent spoken and written English (C1 level)
Instruction: English
- Proven research-oriented attitude and ability to work in interdisciplinary teams
- Experience with FPGA/ASIC development and hardware description languages (e.g., Verilog, VHDL)
- Familiarity with machine learning, signal processing, and AI accelerators
- Programming proficiency in Python and/or C/C++
- Strong problem-solving and analytical skills
- No specific nationality or residency restrictions mentioned
- Open to international applicants
Funding & terms
How to apply
Deadline: 2026-10-25
Interested candidates should submit their application via the TU/e online portal. The application should include a CV, a motivation letter, and academic transcripts. Shortlisted candidates will be invited for an interview.
- CV
- Motivation letter
- Academic transcripts (BSc + MSc)
- Proof of English proficiency (if applicable)
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