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Engineering● Open⏰ 8 days leftPreview

PhD Research Fellow in Multi-Level Resistive Memory Cells for Ternary Computing

Join a cutting-edge research team to innovate in post-binary electronics.

Best for:Best for candidates with a strong foundation in microelectronics and a passion for innovative memory technologies.

University of South-Eastern Norway · Borre, Norway · R1 · First-stage researcher
More professors at University of South-Eastern Norway
Resistive memoryTernary computingMicrofabricationElectronics
Deadline
Oct 22, 2026
8 days
Funding
Salaried
NOK 550.8k/yr
Start date
flexible
Full-time
Location
Borre
Norway

Overview

The University of South-Eastern Norway is seeking a PhD Research Fellow to explore the fabrication and characterization of multi-level resistive memory technology. This three-year, full-time position focuses on developing advanced memory devices that operate beyond traditional binary systems. The successful candidate will engage in hands-on research within the MST-lab, contributing to the design and testing of novel ReRAM cells. Applicants are expected to demonstrate a strong background in relevant fields and a commitment to collaborative research.

PhDResistive memoryTernary logicMicroelectronicsNanotechnologyChip designMemory technologyResearch fellow

What you'll do

  • Fabricate and characterize multi-level resistive memory cells using advanced deposition techniques.
  • Conduct extensive characterization activities to evaluate device performance and reliability.
  • Collaborate with team members on the design of mixed-signal circuitry for ReRAM controllers.
  • Participate in research dissemination through publications and presentations.
  • Engage in national and international research environments to enhance collaborative efforts.

Requirements

Degree required: Master’s degree in Micro/Nanoelectronics, Electronic/Electrical Engineering, Nanotechnology, Materials Science and Engineering, Physics or related fields

Degree offered: PhD

Language: English; proficiency documented through standardized tests

Instruction: English

Publications: None specified

Required skills
  • Strong background in electronics and chip design
  • Experience in microfabrication techniques
  • Proficiency in electrical characterization methods
  • Excellent written and spoken English
Nice to have
Hands-on experience in cleanroom environmentsFamiliarity with CMOS chip design flowsKnowledge of EDA tools like Cadence VirtuosoExperience with Verilog-A or RTL in (System)Verilog or VHDL
Eligibility
  • Master’s degree must be obtained by the application deadline
  • Weighted average grade of B or higher required

Funding & terms

Type
Salaried
Amount
NOK 550.8k/yr
Duration
3 years
Programme
Norwegian State salary scale
Norwegian State salary scale

How to apply

Deadline: 2026-10-22

Interested candidates should submit their application through the university's job portal. Ensure all required documents are included with your application.

Documents required
  • CV
  • Cover letter
  • Master’s degree transcripts
  • Proof of English proficiency
  • Reference letters
↗Apply on site

Contact

Marius Tannum· Head of Department

MT
Prof.
Marius Tannum
Faculty of Technology, Natural Sciences and Maritime Sciences
Lab
Ternary Research Group
University of South-Eastern Norway
Norway
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