Junction defect characterization of low thermal budget SOI MOSFET

This PhD position at Universite Grenoble Alpes, in collaboration with CEA-Leti and CROMA (IMEP-LAHC), focuses on the in-depth electrical and physical characterization of transistor junctions fabricated under restricted thermal budgets. The research aims to overcome challenges in dopant activation for 3D sequential integration of advanced semiconductor devices. The candidate will utilize existing experimental data alongside simulation tools to understand process integration and analyze device defects. The role expects active scientific contributions, including academic publications and presentations.

• Perform physical and electrical characterization of advanced SOI MOSFET junctions using methods such as noise measurements and DLTS.
• Conduct simulations, literature reviews, and TCAD modeling to develop new research ideas.
• Investigate process understanding including ion implantation and solid-phase epitaxial regrowth.
• Manage integration and cleanroom fabrication workflows.
• Valorize research findings through scientific presentations and journal articles.