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Microelectronics and Neuromorphic Engineering● OpenPreview

Injection-Locked Oscillators based Liquid Neural Networks for Generative Edge Intelligence

Design analog liquid neural networks using injection-locked oscillators for energy-efficient generative edge intelligence.

Best for:Best for microelectronics or electrical engineering graduates with a strong background in analog circuit design and neuromorphic computing.

Universite Grenoble Alpes · Grenoble, France · R1 · First-stage researcher
More professors at Universite Grenoble Alpes
Liquid Neural NetworksGenerative Edge IntelligenceAnalog Circuit DesignNeuromorphic SystemsInjection-Locked Oscillators
Deadline
Nov 30, 2026
46 days
Funding
Salaried
CEA contract
Start date
2026-10-01
Fixed-term
Location
Grenoble
France

Overview

This PhD position focuses on translating MIT-developed liquid neural network (LNN) algorithms into physical circuit-level implementations for generative edge AI. Hosted within the Laboratory of Integrated Circuits for Energy Management, Sensors and Actuators at Universite Grenoble Alpes, the project aims to build ultra-low-power time-mode cells using oscillators that mimic liquid dynamics. The successful candidate will design, interconnect, and validate a silicon demonstrator to overcome the extreme parameter density and scaling challenges of traditional neuromorphic architectures. Applicants are expected to undertake circuit design, simulation, and experimental validation to pioneer a new generation of hardware-efficient AI systems.

liquid neural networksedge AIanalog circuitsneuromorphic engineeringsilicon demonstratoroscillatorslow-power design

What you'll do

  • Translate liquid neural network algorithmic concepts into physical circuit-level implementations
  • Develop ultra-low power time-mode cells based on oscillators that replicate liquid dynamics
  • Interconnect time-mode cells into stable, recurrent circuit architectures tailored for generative AI tasks
  • Design and simulate analog integrated circuits targeting edge computing applications
  • Fabricate and validate a silicon demonstrator to evaluate hardware performance
  • Collaborate with researchers to publish findings in peer-reviewed journals and conferences

Requirements

Degree required: Master of Science or equivalent degree in Microelectronics, Electrical Engineering, or related discipline

Degree offered: PhD

Language: English or French proficiency as per institutional standards

Instruction: English / French

Required skills
  • Strong background in analog or mixed-signal integrated circuit design
  • Familiarity with neuromorphic computing or recurrent neural network principles
  • Experience with circuit simulation and layout tools (e.g., Cadence)
  • Understanding of low-power hardware design methodologies
Nice to have
Prior research experience with oscillator-based circuits or time-mode computingHands-on experience with silicon tape-outs and hardware measurementKnowledge of machine learning hardware acceleration
Eligibility
  • Hold an eligible Master's degree prior to the start date

Funding & terms

Type
Salaried
Amount
CEA contract
Duration
36 months
Programme
CEA
CEA

How to apply

Deadline: 2026-11-30

Interested candidates should submit their application through the official doctoral portal before the deadline. Ensure all required academic documents and contact details for references are included in the submission package.

Documents required
  • CV
  • Cover letter
  • BSc transcripts
  • MSc transcripts
↗Apply on site

Contact

Mona Ezzadeen· Supervisor

mona.ezzadeen@cea.fr

0438782701

ME
Prof.
Mona Ezzadeen
Department of Silicon Components
Lab
Laboratoire des circuits intégrés pour la Gestion de l'Energie, les Capteurs et Actionneurs
Universite Grenoble Alpes
France
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