PhD in Hardware Architectures for Physics-Informed AI

This PhD position at Eindhoven University of Technology focuses on designing hardware architectures for physics-informed AI models, with a strong emphasis on FPGA and ASIC acceleration for edge deployment. The project aims to bridge the gap between computationally demanding AI methods and efficient hardware implementation, enabling real-time operation in scientific, industrial, and sensing applications. You will collaborate with industry partners like Smiths Detection and Sioux Technologies to build a real-time demonstrator for counterfeit cash detection using Physics-Infused Deep Unfolding (PIDU). The broader goal is to create scalable design methodologies for a wide range of physics-informed AI techniques, including deep unfolding, model-based learning, and hybrid optimization-learning methods. The role involves algorithm development, hardware-software co-design, and interdisciplinary collaboration within the NWO OTP project framework.

• Design novel hardware architectures for FPGA/ASIC-based acceleration of physics-informed AI models.
• Develop algorithms and methodologies for efficient mapping of hybrid model-based and learning-based algorithms onto reconfigurable hardware platforms.
• Collaborate with industry partners to build a real-time demonstrator for counterfeit cash detection using Physics-Infused Deep Unfolding (PIDU).
• Conduct hardware-software co-design to enable real-time operation in scientific, industrial, and sensing applications.
• Contribute to both fundamental research and practical demonstrators within the NWO OTP project framework.
• Engage in interdisciplinary collaboration with the Electrical Engineering department and external stakeholders.
• Participate in teaching and mentoring activities, including coaching students and developing teaching skills.