LLM-Assisted Generation of Functional and Formal Hardware Models
Explore how Large Language Models can automate the creation of functional and formal hardware models for complex systems.
Best for:Best for candidates with a strong background in computer architecture, formal verification, and machine learning applications.
Overview
Université Paris-Saclay offers a three-year doctoral position at the CEA LIST laboratory, focusing on the automated generation of functional and formal hardware models using Large Language Models (LLMs). The project addresses the complexity of modern hardware architectures like RISC-V processors by developing methodologies that combine LLM generation with simulation and formal verification tools. The successful candidate will work closely with research supervisors to reduce manual modeling effort and ensure model correctness. Practical validation will be conducted on realistic hardware case studies.
What you'll do
- Design and develop methodologies utilizing Large Language Models to automatically generate functional and formal hardware models from specifications
- Integrate feedback mechanisms from simulation and formal verification tools into the generation workflow
- Explore the application of reinforcement learning techniques to refine and optimize model generation
- Conduct experimental validation using realistic hardware case studies, including RISC-V processors and hardware accelerators
- Publish research findings in peer-reviewed conferences and journals and collaborate with laboratory team members
Requirements
Degree required: Master's degree in Computer Science, Computer Engineering, or related technical field
Degree offered: PhD
Language: English or French; no specific language test score mandated
Instruction: English
- Strong background in hardware design, computer architecture, or digital systems
- Familiarity with formal verification methods and functional simulation tools
- Understanding of Large Language Models and their application to code or model generation
- Proficiency in programming languages relevant to hardware modeling or machine learning
- Open to applicants meeting standard doctoral admission criteria at Université Paris-Saclay
Funding & terms
How to apply
Deadline: 2026-11-30
Submit your application through the official portal before the stated deadline. Ensure all required documentation including academic records and contact details are provided.
- CV
- Cover letter
- Academic transcripts
Contact
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