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Microelectronics and Photonics● OpenPreview

PhD on Co-Optimization for RF Transistors on Nanometer Technologies

Develop advanced high-performance RF transistors for next-generation 5G/6G and IoT systems through integrated device and process co-optimization.

Best for:Best for candidates with a strong background in microelectronics, semiconductor physics, and RF device simulation.

Universite Grenoble Alpes · Grenoble, France · R1 · First-stage researcher
More professors at Universite Grenoble Alpes
RF TransistorsNanometer TechnologiesTCAD SimulationsFD-SOI3D Architectures
Deadline
Nov 30, 2026
46 days
Funding
Salaried
CEA contract
Start date
2026-10-01
Fixed-term
Location
Grenoble
France

Overview

This doctoral position focuses on the integrated co-optimization of materials, fabrication processes, and device architectures to design high-performance RF transistors on advanced nanometer-scale technologies. Based at Université Grenoble Alpes in collaboration with CEA-Leti, the research combines experimental development, characterization, and advanced TCAD simulations. The successful candidate will investigate planar and 3D device platforms such as FD-SOI, GAA, and CFET to improve figures of merit like transit frequency and noise behavior. The project aims to establish technology guidelines for future energy-efficient communication and IoT applications.

RF transistorsFD-SOIGAACFETTCAD simulation5G/6Gmicroelectronicssemiconductor devices

What you'll do

  • Design and optimize advanced RF transistor architectures using both experimental and simulation approaches.
  • Perform structural and electrical characterization of fabricated semiconductor devices.
  • Conduct advanced TCAD simulations to evaluate integration schemes such as FD-SOI, GAA, and CFET.
  • Investigate the impact of spacers, gate stacks, junction placement, and source/drain materials on RF efficiency.
  • Analyze key RF performance metrics including transit frequency, maximum oscillation frequency, noise, and linearity.
  • Contribute to project reporting, technical documentation, and dissemination of research findings in scientific venues.

Requirements

Degree required: Master of Science or equivalent degree in Microelectronics, Nanotechnology, Electrical Engineering, or related fields

Degree offered: PhD

Language: English or French; no specific language test mandatory based on listing

Instruction: English / French

Required skills
  • Solid foundation in semiconductor physics and microelectronics
  • Experience with semiconductor device characterization or cleanroom processing
  • Familiarity with TCAD simulation tools or semiconductor modelling
  • Strong analytical and problem-solving skills
Nice to have
Prior knowledge of RF transistor design and figures of meritExperience with advanced node architectures such as FD-SOI, GAA, or CFETProgramming skills for data analysis and automation
Eligibility
  • Open to qualified international and domestic applicants holding a recognized Master's degree

Funding & terms

Type
Salaried
Amount
CEA contract
Duration
36 months
Programme
CEA
CEA

How to apply

Deadline: 2026-11-30

Interested applicants should submit their application package through the official portal before the deadline. Ensure all required academic transcripts and supporting documents are attached.

Documents required
  • CV
  • Cover letter
  • Academic transcripts
↗Apply on site

Contact

Tadeu Mota Frutuoso· Supervisor

tadeu.motafrutuoso@cea.fr

0767444363

TM
Prof.
Tadeu Mota Frutuoso
Departement Composants Silicium (LETI)
Lab
Laboratoire des Transistors Avances
Universite Grenoble Alpes
France
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